Travelled to:
1 × France
Collaborated with:
H.P.E.Vranken H.Wunderlich
Talks about:
silicon (1) layout (1) insert (1) impact (1) point (1) time (1) test (1) dure (1) area (1)
Person: Ferry Syafei Sapei
DBLP: Sapei:Ferry_Syafei
Contributed to:
Wrote 1 papers:
- DATE-v2-2004-VrankenSW #layout
- Impact of Test Point Insertion on Silicon Area and Timing during Layout (HPEV, FSS, HJW), pp. 810–815.