BibSLEIGH — Hans-Joachim

Travelled to:

6 × Germany
6 × USA
9 × France

Collaborated with:

M.A.Kochte M.Elm S.Hellebrand M.E.Imhof ∅ C.G.Zoellin S.Holst V.N.Yarmolik P.Prinetto H.P.E.Vranken M.Wagner J.Zhou S.Chiusano R.Dorsch A.Hertwig B.Eschermann W.Rosenstiel S.D.Carlo J.Leenstra N.Mäding F.S.Sapei M.Schaal A.Irion G.Kiefer S.Cataldo F.Reimann M.Glaß J.Teich A.Cook L.R.Gómez D.Ull P.Engelke U.Abelein E.Schneider X.Wen S.Hillebrecht D.Erb B.Becker R.Baranowski F.Firouzi S.Kiamehr C.Liu M.B.Tahoori H.Zhang L.Bauer J.Henkel R.S.Khaligh M.Radetzki T.Russ

Talks about:

test (10) diagnosi (5) fault (5) self (5) scan (5) bist (5) effici (4) base (4) architectur (3) synthesi (3)

Person: Hans-Joachim Wunderlich

DBLP: Wunderlich:Hans=Joachim

Contributed to:

2015

2014

2013

2011

2010

2009

2008

2007

2006

2004

2001

2000

1999

1998

1997

1994

1991

1987

1986

1985

Wrote 30 papers:

DATE-2015-BaranowskiFKLTW #online #predict: On-line prediction of NBTI-induced aging rates (RB, FF, SK, CL, MBT, HJW), pp. 589–592.
DATE-2015-SchneiderHKWW #fault #simulation: GPU-accelerated small delay fault simulation (ES, SH, MAK, XW, HJW), pp. 1174–1179.
DAC-2014-ReimannGTCGUWEA #architecture #integration: Advanced Diagnosis: SBST and BIST Integration in Automotive E/E Architectures (FR, MG, JT, AC, LRG, DU, HJW, PE, UA), p. 9.
DAC-2014-ZhangKIBWH #configuration management #named #reliability: GUARD: GUAranteed Reliability in Dynamically Reconfigurable Systems (HZ, MAK, MEI, LB, HJW, JH), p. 6.
DATE-2014-AbeleinCEGRGRTUW #architecture #integration: Non-intrusive integration of advanced diagnosis features in automotive E/E-architectures (UA, AC, PE, MG, FR, LRG, TR, JT, DU, HJW), pp. 1–6.
DATE-2014-ImhofW #architecture #fault tolerance: Bit-Flipping Scan — A unified architecture for fault tolerance and offline test (MEI, HJW), pp. 1–6.
DATE-2013-HillebrechtKEWB #generative: Accurate QBF-based test pattern generation in presence of unknown values (SH, MAK, DE, HJW, BB), pp. 436–441.
DATE-2013-WagnerW #analysis #performance #statistics: Efficient variation-aware statistical dynamic timing analysis for delay test applications (MW, HJW), pp. 276–281.
DATE-2011-KochteW #evaluation #fault #satisfiability: SAT-based fault coverage evaluation in the presence of unknown values (MAK, HJW), pp. 1303–1308.
DAC-2010-KochteSWZ #fault #manycore #performance #simulation: Efficient fault simulation on many-core processors (MAK, MS, HJW, CGZ), pp. 380–385.
DATE-2010-ElmW #named #self: BISD: Scan-based Built-In self-diagnosis (ME, HJW), pp. 1243–1248.
DATE-2009-HolstW #algorithm: A diagnosis algorithm for extreme space compaction (SH, HJW), pp. 1355–1360.
DATE-2009-KochteZIKRWCP #modelling #transaction #using #validation: Test exploration and validation using transaction level models (MAK, CGZ, MEI, RSK, MR, HJW, SDC, PP), pp. 1250–1253.
DAC-2008-ElmWIZLM #clustering #reduction: Scan chain clustering for test power reduction (ME, HJW, MEI, CGZ, JL, NM), pp. 828–833.
DATE-2008-ElmW #embedded: Scan Chain Organization for Embedded Diagnosis (ME, HJW), pp. 468–473.
DAC-2007-ImhofZWML #reduction #testing: Scan Test Planning for Power Reduction (MEI, CGZ, HJW, NM, JL), pp. 521–526.
DATE-2006-ZhouW #constraints #self: Software-based self-test of processors under power constraints (JZ, HJW), pp. 430–435.
DATE-v2-2004-VrankenSW #layout: Impact of Test Point Insertion on Silicon Area and Timing during Layout (HPEV, FSS, HJW), pp. 810–815.
DATE-2001-ChiusanoCPW #on the #set: On applying the set covering model to reseeding (SC, SDC, PP, HJW), pp. 156–161.
DATE-2001-DorschW #embedded #logic #testing #using: Using mission logic for embedded testing (RD, HJW), p. 805.
DATE-2001-IrionKVW #clustering #logic #performance #synthesis: Circuit partitioning for efficient logic BIST synthesis (AI, GK, HPEV, HJW), pp. 86–91.
DATE-2000-CataldoCPW #functional #generative #hardware: Optimal Hardware Pattern Generation for Functional BIST (SC, SC, PP, HJW), pp. 292–297.
DATE-1999-HellebrandWY #symmetry: Symmetric Transparent BIST for RAMs (SH, HJW, VNY), pp. 702–707.
DATE-1998-YarmolikHW #performance #self: Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs (VNY, SH, HJW), pp. 173–179.
EDTC-1997-HertwigW #performance: Fast controllers for data dominated applications (AH, HJW), pp. 84–89.
EDAC-1994-HellebrandW #self #synthesis: Synthesis of Self-Testable Controllers (SH, HJW), pp. 580–585.
DAC-1991-EschermannW #approach #finite #self #state machine #synthesis: A Unified Approach for the Synthesis of Self-Testable Finite State Machines (BE, HJW), pp. 372–377.
DAC-1987-Wunderlich #on the #random testing #testing: On Computing Optimized Input Probabilities for Random Tests (HJW), pp. 392–398.
DAC-1986-WunderlichR #fault #modelling #on the: On fault modeling for dynamic MOS circuits (HJW, WR), pp. 540–546.
DAC-1985-Wunderlich #analysis #named #probability #testing: PROTEST: a tool for probabilistic testability analysis (HJW), pp. 204–211.