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Travelled to:
3 × France
Collaborated with:
F.Paterna A.Acquaviva G.Desoli L.Benini M.Coppola S.Curaba M.D.Grammatikakis G.Maruccia A.Caprara M.Olivieri
Talks about:
effici (2) chip (2) multimedia (1) processor (1) framework (1) distribut (1) algorithm (1) platform (1) multicor (1) uniform (1)

Person: Francesco Papariello

DBLP DBLP: Papariello:Francesco

Contributed to:

DATE 20112011
DATE 20092009
DATE DF 20042004

Wrote 3 papers:

DATE-2011-PaternaACPDB #algorithm #energy #manycore #online #performance
An efficient on-line task allocation algorithm for QoS and energy efficiency in multicore multimedia platforms (FP, AA, AC, FP, GD, LB), pp. 100–105.
DATE-2009-PaternaBAPDO #adaptation #multi
Adaptive idleness distribution for non-uniform aging tolerance in MultiProcessor Systems-on-Chip (FP, LB, AA, FP, GD, MO), pp. 906–909.
DATE-DF-2004-CoppolaCGMP #framework #modelling #named #simulation
OCCN: A Network-On-Chip Modeling and Simulation Framework (MC, SC, MDG, GM, FP), pp. 174–179.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.