Travelled to:
1 × Germany
Collaborated with:
J.Wang H.Zeng K.Huang Y.Tang
Talks about:
chip (2) processor (1) reliabl (1) network (1) effici (1) design (1) buffer (1) multi (1) zero (1) tile (1)
Person: Ge Zhang
DBLP: Zhang:Ge
Contributed to:
Wrote 1 papers:
- DATE-2008-WangZHZT #design #multi #reliability
- Zero-Efficient Buffer Design for Reliable Network-on-Chip in Tiled Chip-Multi-Processor (JW, HZ, KH, GZ, YT), pp. 792–795.