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Travelled to:
2 × USA
Collaborated with:
D.E.Krekelberg E.Vandris C.S.Jhon E.Shragowitz L.Lin
Talks about:
silicon (2) compil (2) algorithm (1) synthesi (1) switch (1) memori (1) layout (1) effici (1) simul (1) level (1)

Person: Gerald E. Sobelman

DBLP DBLP: Sobelman:Gerald_E=

Contributed to:

DAC 19911991
DAC 19861986
DAC 19851985

Wrote 3 papers:

DAC-1991-VandrisS #algorithm #fault #memory management #performance #simulation
Algorithms for Fast, Memory Efficient Switch-Level Fault Simulation (EV, GES), pp. 138–143.
DAC-1986-KrekelbergSSL #automation #compilation #layout #synthesis
Automated layout synthesis in the YASC silicon compiler (DEK, ES, GES, LSL), pp. 447–453.
DAC-1985-KrekelbergSJ #compilation
Yet another silicon compiler (DEK, GES, CSJ), pp. 176–182.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.