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Travelled to:
1 × Germany
2 × USA
Collaborated with:
Y.Liang T.Mitra
Talks about:
instruct (3) lock (3) cach (3) centric (2) wcet (2) multitask (1) partial (1) analysi (1) system (1) integr (1)

Person: Huping Ding

DBLP DBLP: Ding:Huping

Contributed to:

DATE 20142014
DAC 20132013
DAC 20122012

Wrote 3 papers:

DATE-2014-DingLM
WCET-Centric dynamic instruction cache locking (HD, YL, TM), pp. 1–6.
DAC-2013-DingLM #analysis #multi #realtime
Integrated instruction cache analysis and locking in multitasking real-time systems (HD, YL, TM), p. 10.
DAC-2012-DingLM
WCET-centric partial instruction cache locking (HD, YL, TM), pp. 412–420.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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