Travelled to:1 × France
Collaborated with:X.Chen S.Li T.Coenen A.Chattopadhyay G.Ascheid T.G.Noll
Talks about:synthesi (1) model (1) level (1) fpgas (1) embed (1) high (1)
Person: Jochen Schleifer
DBLP: Schleifer:Jochen
Contributed to:
2013Wrote 1 papers:
- DATE-2013-ChenLSCCAN #embedded #modelling #synthesis
- High-level modeling and synthesis for embedded FPGAs (XC, SL, JS, TC, AC, GA, TGN), pp. 1565–1570.