BibSLEIGH corpus
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Travelled to:
1 × USA
2 × Germany
4 × France
Collaborated with:
G.Ascheid R.Leupers H.Meyr X.Chen H.Ishebabi D.Kammler Z.Wang K.Singh C.Chen O.Schliebusch J.Constantin L.Wang G.Karakonstantis A.Burg K.Shahzad A.Khalid Z.E.Rákossy G.Paul S.Li J.Schleifer T.Coenen T.G.Noll W.Ahmed K.Karuri M.Steinert G.Braun A.Nohl B.Geukes E.M.Witte
Talks about:
processor (4) embed (4) explor (3) base (3) architectur (2) synthesi (2) configur (2) design (2) model (2) level (2)

Person: Anupam Chattopadhyay

DBLP DBLP: Chattopadhyay:Anupam

Contributed to:

DATE 20152015
DAC 20132013
DATE 20132013
DATE 20082008
DATE 20072007
DATE 20062006
DATE DF 20042004

Wrote 8 papers:

Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment (JC, LW, GK, AC, AB), pp. 381–386.
DAC-2013-ShahzadKRPC #algorithm #encryption #named
CoARX: a coprocessor for ARX-based cryptographic algorithms (KS, AK, ZER, GP, AC), p. 10.
DATE-2013-ChenLSCCAN #embedded #modelling #synthesis
High-level modeling and synthesis for embedded FPGAs (XC, SL, JS, TC, AC, GA, TGN), pp. 1565–1570.
DATE-2013-WangSCC #design #embedded #estimation #performance #reliability
Accurate and efficient reliability estimation techniques during ADL-driven embedded processor design (ZW, KS, CC, AC), pp. 547–552.
DATE-2008-ChattopadhyayCILAM #architecture #configuration management #modelling
High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures (AC, XC, HI, RL, GA, HM), pp. 1334–1339.
DATE-2007-ChattopadhyayAKKLAM #configuration management #design #embedded
Design space exploration of partially re-configurable embedded processors (AC, WA, KK, DK, RL, GA, HM), pp. 319–324.
DATE-2006-ChattopadhyayGKWSILAM #automation #embedded
Automatic ADL-based operand isolation for embedded processors (AC, BG, DK, EMW, OS, HI, RL, GA, HM), pp. 600–605.
DATE-DF-2004-SchliebuschCLAMSBN #architecture #implementation #synthesis
RTL Processor Synthesis for Architecture Exploration and Implementation (OS, AC, RL, GA, HM, MS, GB, AN), pp. 156–160.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.