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Travelled to:
1 × USA
Collaborated with:
H.M.Jacobson P.Bose Z.Hu A.Buyuktosunoglu V.V.Zyuban R.J.Eickemeyer L.Eisen J.Griswell D.Logan B.Sinharoy
Talks about:
processor (1) stretch (1) server (1) effici (1) limit (1) clock (1) class (1) gate (1)

Person: Joel M. Tendler

DBLP DBLP: Tendler:Joel_M=

Contributed to:

HPCA 20052005

Wrote 1 papers:

HPCA-2005-JacobsonBHBZEEGLST #performance
Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors (HMJ, PB, ZH, AB, VVZ, RJE, LE, JG, DL, BS, JMT), pp. 238–242.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.