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Travelled to:
1 × Spain
3 × USA
Collaborated with:
M.Martonosi Y.Li D.M.Brooks K.Skadron S.Kaxiras R.Joseph X.Li C.Yan B.C.Lee H.M.Jacobson P.Bose A.Buyuktosunoglu V.V.Zyuban R.J.Eickemeyer L.Eisen J.Griswell D.Logan B.Sinharoy J.M.Tendler
Talks about:
wavelet (2) design (2) cmp (2) microprocessor (1) architectur (1) constraint (1) satisfact (1) processor (1) character (1) algorithm (1)

Person: Zhigang Hu

DBLP DBLP: Hu:Zhigang

Contributed to:

HPCA 20032003
HPCA 20042004
HPCA 20052005
HPCA 20062006
PDP 20112011

Wrote 6 papers:

HPCA-2003-HuMK #correlation #named
TCP: Tag Correlating Prefetchers (ZH, MM, SK), pp. 317–326.
HPCA-2004-JosephHM #analysis #case study #design #experience
Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization (RJ, ZH, MM), pp. 36–47.
HPCA-2005-JacobsonBHBZEEGLST #performance
Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors (HMJ, PB, ZH, AB, VVZ, RJE, LE, JG, DL, BS, JMT), pp. 238–242.
HPCA-2005-LiBHS #architecture #energy #performance #smt
Performance, Energy, and Thermal Considerations for SMT and CMP Architectures (YL, DMB, ZH, KS), pp. 71–82.
HPCA-2006-LiLBHS #constraints #design #physics
CMP design space exploration subject to physical constraints (YL, BCL, DMB, ZH, KS), pp. 17–28.
PDP-2011-LiHY #algorithm #scheduling #workflow
A Deadline Satisfaction Enhanced Workflow Scheduling Algorithm (XL, ZH, CY), pp. 55–61.

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