Travelled to:1 × Germany
7 × USA
Collaborated with:A.Buyuktosunoglu H.M.Jacobson J.A.Abraham V.S.Iyengar L.Trevillyan R.J.Eickemeyer N.Madan M.Annavaram A.Vega M.B.Healy S.L.Xi G.Wei D.M.Brooks E.Acar V.Jiménez F.P.O'Connell F.J.Cazorla M.Valero J.H.Derby M.Franceschini C.Johnson R.K.Montoye P.G.Emma K.Kailas V.Puente R.Yu A.Hartstein J.H.Moreno J.A.Darringer M.S.Gupta I.Nair J.A.Rivers J.Shin A.J.Weger Z.Hu V.V.Zyuban L.Eisen J.Griswell D.Logan B.Sinharoy J.M.Tendler
Talks about:processor (5) power (4) architectur (2) effici (2) multi (2) model (2) gate (2) core (2) base (2) microarchitectur (1)
Person: Pradip Bose
DBLP: Bose:Pradip
Facilitated 1 volumes:
EdContributed to:
20152014
20122012201120051996
1982Wrote 10 papers:
- HPCA-2015-JimenezBBOCV #manycore #performance
- Increasing multicore system efficiency through intelligent bandwidth shifting (VJ, AB, PB, FPO, FJC, MV), pp. 39–50.
- HPCA-2015-XiJBWB #architecture #fault
- Quantifying sources of error in McPAT and potential impacts on architectural studies (SLX, HMJ, PB, GYW, DMB), pp. 577–589.
- HPCA-2014-EmmaBHKPYHBM #3d
- 3D stacking of high-performance processors (PGE, AB, MBH, KK, VP, RY, AH, PB, JHM), pp. 500–511.
- DATE-2012-BoseBDGHJNRSVW #challenge #manycore #power management
- Power management of multi-core chips: Challenges and pitfalls (PB, AB, JAD, MSG, MBH, HMJ, IN, JAR, JS, AV, AJW), pp. 977–982.
- HPCA-2012-VegaBBDFJM #architecture
- Architectural perspectives of future wireless base stations based on the IBM PowerEN™ processor (AV, PB, AB, JHD, MF, CJ, RKM), pp. 423–432.
- HPCA-2011-JacobsonBBAE #abstraction #architecture #modelling #scalability
- Abstraction and microarchitecture scaling in early-stage power modeling (HMJ, AB, PB, EA, RJE), pp. 394–405.
- HPCA-2011-MadanBBA #manycore #power management
- A case for guarded power gating for multi-core processors (NM, AB, PB, MA), pp. 291–300.
- HPCA-2005-JacobsonBHBZEEGLST #performance
- Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors (HMJ, PB, ZH, AB, VVZ, RJE, LE, JG, DL, BS, JMT), pp. 238–242.
- HPCA-1996-IyengarTB #infinity #modelling
- Representative Traces for Processor Models with Infinite Cache (VSI, LT, PB), pp. 62–72.
- DAC-1982-BoseA #array #generative #logic #programmable #testing
- Test generation for programmable logic arrays (PB, JAA), pp. 574–580.