Travelled to:1 × China
1 × Germany
4 × USA
Collaborated with:E.K.Ardestani J.Torrellas M.Das G.Southern F.J.Mesa-Martinez S.Sudhakrishnan J.T.Madhavan E.J.W.Jr. B.B.Fraguela P.Feautrier D.A.Padua W.Liu J.Tuck L.Ceze W.Ahn K.Strauss
Talks about:program (3) base (2) unsynchron (1) understand (1) processor (1) character (1) structur (1) parallel (1) overhead (1) multicor (1)
Person: Jose Renau
DBLP: Renau:Jose
Contributed to:
2015
2013
2010
200820062003Wrote 6 papers:
- PPoPP-2015-DasSR #communication #concurrent #detection #program analysis #thread
- Section based program analysis to reduce overhead of detecting unsynchronized thread communication (MD, GS, JR), pp. 283–284.
- HPCA-2013-ArdestaniR #manycore #named #performance #using
- ESESC: A fast multicore simulator using Time-Based Sampling (EKA, JR), pp. 448–459.
- ASPLOS-2010-Mesa-MartinezAR #behaviour
- Characterizing processor thermal behavior (FJMM, EKA, JR), pp. 193–204.
- MSR-2008-SudakrishnanMWR #comprehension #debugging
- Understanding bug fix patterns in verilog (SS, JTM, EJWJ, JR), pp. 39–42.
- PPoPP-2006-LiuTCASRT #compilation #named
- POSH: a TLS compiler that exploits program structure (WL, JT, LC, WA, KS, JR, JT), pp. 158–167.
- PPoPP-2003-FraguelaRFPT #memory management #parallel #programming
- Programming the FlexRAM parallel intelligent memory system (BBF, JR, PF, DAP, JT), pp. 49–60.