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Travelled to:
1 × USA
Collaborated with:
H.Wang N.D.Dutt A.Nicolau
Talks about:
architectur (1) multichip (1) synthesi (1) scalabl (1) filter (1) modul (1) level (1) high (1) use (1) iir (1)

Person: Kai-Yeung Siu

DBLP DBLP: Siu:Kai=Yeung

Contributed to:

DAC 19931993

Wrote 1 papers:

DAC-1993-WangDNS #architecture #multi #scalability #synthesis #using
High-Level Synthesis of Scalable Architectures for IIR Filters using Multichip Modules (HW, NDD, AN, KYS), pp. 336–342.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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