Travelled to:1 × Italy
Collaborated with:∅ M.L.0001 Z.Shao X.Guo M.Lesourd T.Bourke Lélio Brun P.Dagand X.Leroy M.Pouzet R.Gu David Costanzo J.Kim M.Yoon
Talks about:verifi (3) formal (3) schedul (2) preemptiv (1) herbrand (1) abstract (1) virtual (1) timelin (1) extract (1) classic (1)
Person: Lionel Rieg
DBLP: Rieg:Lionel
Contributed to:
2013
2019
2017
2020Wrote 4 papers:
- CSL-2013-Rieg #using
- Extracting Herbrand trees in classical realizability using forcing (LR), pp. 597–614.
- CAV-2019-GuoLLRS #analysis #kernel #scheduling
- Integrating Formal Schedulability Analysis into a Verified OS Kernel (XG, ML, ML0, LR, ZS), pp. 496–514.
- PLDI-2017-BourkeBDLPR #compilation
- A formally verified compiler for Lustre (TB, LB, PÉD, XL, MP, LR), pp. 586–601.
- POPL-2020-LiuRSGCKY #abstraction #timeline #verification
- Virtual timeline: a formal abstraction for verifying preemptive schedulers with temporal isolation (ML0, LR, ZS, RG, DC, JEK, MKY), p. 31.