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Travelled to:
1 × Germany
Collaborated with:
J.L.Desbarbieux N.Drach F.Wajsbürt
Talks about:
order (2) superscalar (1) processor (1) design (1) buffer (1) fpga (1) out (1)

Person: Mathieu Rosiere

DBLP DBLP: Rosiere:Mathieu

Contributed to:

DATE 20122012

Wrote 1 papers:

DATE-2012-RosiereDDW #design
An out-of-order superscalar processor on FPGA: The ReOrder Buffer design (MR, JLD, ND, FW), pp. 1549–1554.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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