Stem superscalar$ (all stems)
31 papers:
- HPCA-2015-PeraisS #effectiveness #framework #named #predict
- BeBoP: A cost effective predictor infrastructure for superscalar value prediction (AP, AS), pp. 13–25.
- DATE-2012-RosiereDDW #design
- An out-of-order superscalar processor on FPGA: The ReOrder Buffer design (MR, JLD, ND, FW), pp. 1549–1554.
- PPoPP-2012-AnderschCJ #embedded #parallel #programming
- Programming parallel embedded and consumer applications in OpenMP superscalar (MA, CCC, BHHJ), pp. 281–282.
- DATE-2007-HaastregtK #interactive #optimisation #performance #random #using
- Interactive presentation: Feasibility of combined area and performance optimization for superscalar processors using random search (SvH, PMWK), pp. 606–611.
- HPCA-2006-HuKLS #approach #implementation #performance
- An approach for implementing efficient superscalar CISC processors (SH, IK, MHL, JES), pp. 41–52.
- DATE-2002-PonomarevKG #estimation #named
- AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors (DP, GK, KG), pp. 124–129.
- CC-2002-RelePOG #functional #optimisation
- Optimizing Static Power Dissipation by Functional Units in Superscalar Processors (SR, SP, SÖ, RG), pp. 261–275.
- DAC-2001-VelevB #effectiveness #satisfiability #verification
- Effective Use of Boolean Satisfiability Procedures in the Formal Verification of Superscalar and VLIW Microprocessors (MNV, REB), pp. 226–231.
- TACAS-2001-Velev #abstraction #automation #verification
- Automatic Abstraction of Memories in the Formal Verification of Superscalar Microprocessors (MNV), pp. 252–267.
- CC-2001-Touati
- Register Saturation in Superscalar and VLIW Codes (SAAT), pp. 213–228.
- HPCA-2000-MoshovosS #dependence #memory management #trade-off
- Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors (AM, GSS), pp. 301–312.
- ITiCSE-1999-FuenteCC #architecture #education
- Teaching computer architecture with a new superscalar processor emulator (SRdlF, MIGC, RMC), pp. 99–102.
- HPCA-1999-RotenbergJS #case study #independence
- A Study of Control Independence in Superscalar Processors (ER, QJ, JES), pp. 115–124.
- LCTES-1999-SchneiderF #abstract interpretation #behaviour #pipes and filters #predict
- Pipeline Behavior Prediction for Superscalar Processors by Abstract Interpretation (JS, CF), pp. 35–44.
- DAC-1998-HattoriNSNUTS #design
- Design Methodology of a 200MHz Superscalar Microprocessor: SH-4 (TH, YN, MS, SN, KU, TT, RS), pp. 246–249.
- DAC-1998-TaylorQBDHHR #functional #multi #verification
- Functional Verification of a Multiple-issue, Out-of-Order, Superscalar Alpha Processor — The DEC Alpha 21264 Microprocessor (SAT, MQ, DB, ND, SH, JH, CR), pp. 638–643.
- CC-1998-StumpelTK #architecture #compilation
- VLIW Compilation Techniques for Superscalar Architectures (ES, MT, UK), pp. 234–248.
- DAC-1997-NelsonJB #execution #verification
- Formal Verification of a Superscalar Execution Unit (KLN, AJ, REB), pp. 161–166.
- HPCA-1997-NoonburgS #framework #modelling #performance #statistics
- A Framework for Statistical Modeling of Superscalar Processor Performance (DBN, JPS), pp. 298–309.
- DAC-1996-Burch #verification
- Techniques for Verifying Superscalar Microprocessors (JRB), pp. 552–557.
- HPCA-1996-GulatiB #parallel #performance #thread
- Performance Study of a Multithreaded Superscalar Microprocessor (MG, NB), pp. 291–301.
- HPCA-1995-Weiss #implementation #multi #queue
- Implementing Register Interlocks in Parallel-Pipeline Multiple Instruction Queue, Superscalar Processors (SW), pp. 14–21.
- EDAC-1994-GreinerLWW #complexity #design #library
- Design of a High Complexity Superscalar Microprocessor with the Portable IDPS ASIC Library (AG, LL, FW, LW), pp. 9–13.
- PLDI-1994-EbciogluGKSZ #compilation
- VLIW Compilation Techniques in a Superscalar Environment (KE, RDG, KCK, GMS, IZ), pp. 36–48.
- PLDI-1994-Wang #performance #precise #predict
- Precise Compile-Time Performance Prediction for Superscalar-Based Computers (KYW), pp. 73–84.
- ASPLOS-1992-MahlkeCHRS #scheduling
- Sentinel Scheduling for VLIW and Superscalar Processors (SAM, WYC, WmWH, BRR, MSS), pp. 238–247.
- ASPLOS-1992-SmithHL #performance
- Efficient Superscalar Performance Through Boosting (MDS, MH, MSL), pp. 248–259.
- PLDI-1991-BernsteinR #scheduling
- Global Instruction Scheduling for Superscalar Machines (DB, MR), pp. 241–255.
- ASPLOS-1991-LeeKB #float #performance
- The Floating-Point Performance of a Superscalar SPARC Processor (RLL, AYK, FAB), pp. 28–37.
- ASPLOS-1991-SohiF #memory management
- High-Bandwidth Data Memory Systems for Superscalar Processors (GSS, MF), pp. 53–62.
- ASPLOS-1989-JouppiW #parallel
- Available Instruction-Level Parallelism for Superscalar and Superpipelined Machines (NPJ, DWW), pp. 272–282.