BibSLEIGH corpus
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Open Knowledge
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Travelled to:
2 × Germany
Collaborated with:
H.T.Vierhaus C.Rousselle A.Behling T.Mohaupt U.Krautz C.Jacobi H.Tast K.Weber
Talks about:
fault (2) error (2) transient (1) processor (1) transfer (1) coverag (1) regist (1) perman (1) method (1) formal (1)

Person: Matthias Pflanz

DBLP DBLP: Pflanz:Matthias

Contributed to:

DATE 20062006
DATE 20012001

Wrote 2 papers:

DATE-2006-KrautzP0TWV #detection #fault #formal method #logic #using
Evaluating coverage of error detection logic for soft errors using formal methods (UK, MP, CJ, HWT, KW, HTV), pp. 176–181.
DATE-2001-RoussellePBMV #embedded #fault
A register-transfer-level fault simulator for permanent and transient faults in embedded processors (CR, MP, AB, TM, HTV), p. 811.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.