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Travelled to:
2 × USA
Collaborated with:
R.A.Bergamaschi R.Camposano J.Bormann J.Lohse G.Venzl
Talks about:
path (2) synthesi (1) industri (1) hardwar (1) analysi (1) design (1) model (1) check (1) data (1) use (1)

Person: Michael Payer

DBLP DBLP: Payer:Michael

Contributed to:

DAC 19951995
DAC 19911991

Wrote 2 papers:

DAC-1995-BormannLPV #design #hardware #industrial #model checking
Model Checking in Industrial Hardware Design (JB, JL, MP, GV), pp. 298–303.
DAC-1991-BergamaschiCP #analysis #synthesis #using
Data-Path Synthesis Using Path Analysis (RAB, RC, MP), pp. 591–596.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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