Travelled to:
1 × France
1 × Spain
2 × USA
Collaborated with:
Y.Chang T.Kuo C.Tsao P.Huang F.Chen Y.Chang L.Lee
Talks about:
flash (6) devic (5) storag (3) overhead (2) reliabl (2) perform (2) enhanc (2) effici (2) design (2) minim (2)
Person: Ming-Chang Yang
DBLP: Yang:Ming=Chang
Contributed to:
Wrote 5 papers:
- DAC-2015-YangCK #design
- Virtual flash chips: rethinking the layer design of flash devices to improve data recoverability (MCY, YHC, TWK), p. 6.
- DATE-2015-ChenYCK #migration #named
- PWL: a progressive wear leveling to minimize data migration overheads for nand flash devices (FHC, MCY, YHC, TWK), pp. 1209–1212.
- SAC-2015-YangCHCLK #performance
- Reliability-aware striping with minimized performance overheads for flash-based storage devices (MCY, YMC, PCH, YHC, LJL, TWK), pp. 1906–1912.
- DAC-2013-TsaoCY #design #garbage collection #performance
- Performance enhancement of garbage collection for flash storage devices: an efficient victim block selection design (CWT, YHC, MCY), p. 6.
- DAC-2013-YangCTH #performance
- New ERA: new efficient reliability-aware wear leveling for endurance enhancement of flash storage devices (MCY, YHC, CWT, PCH), p. 6.