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Travelled to:
1 × Spain
Collaborated with:
J.R.Morrison Jinho Shin D.Kang J.Kim Y.I.Eom Adar A. Kalir Kosta Rozen
Talks about:
optim (2) time (2) cycl (2) semiconductor (1) architectur (1) manufactur (1) algorithm (1) workstat (1) parallel (1) approxim (1)

Person: Minho Lee

DBLP DBLP: Lee:Minho

Contributed to:

SAC 20152015
CASE 20172017
CASE 20192019

Wrote 3 papers:

SAC-2015-LeeKKE #algorithm #architecture #hybrid #memory management #named
M-CLOCK: migration-optimized page replacement algorithm for hybrid DRAM and PCM memory architecture (ML, DK, JK, YIE), pp. 2001–2006.
CASE-2017-LeeMKR #approximate #on the
On the accuracy of analytic approximations for the mean cycle time in semiconductor manufacturing equipment with PM events (ML, JRM, AAK, KR), pp. 737–738.
CASE-2019-ShinLM #assembly #on the #optimisation #parallel
On the Optimization Of Cycle Time in Assembly Lines with Parallel Workstations and Tasks Requiring Multiple Workers (JS, ML, JRM), pp. 916–921.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.