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Travelled to:
1 × Finland
1 × Russia
1 × United Kingdom
2 × USA
Collaborated with:
R.Uhler Arvind M.King M.Katelman M.Vijayaraghavan A.Chlipala
Talks about:
hardwar (2) automat (2) design (2) verif (2) smten (2) multiprocessor (1) translat (1) interfac (1) softwar (1) satisfi (1)

Person: Nirav Dave

DBLP DBLP: Dave:Nirav

Contributed to:

CAV 20152015
OOPSLA 20142014
CAV 20132013
ASPLOS 20122012
FM 20082008

Wrote 5 papers:

CAV-2015-VijayaraghavanC #composition #deduction #design #hardware #multi #verification
Modular Deductive Verification of Multiprocessor Hardware Designs (MV, AC, A, ND), pp. 109–127.
OOPSLA-2014-UhlerD #satisfiability
Smten with satisfiability-based search (RU, ND), pp. 157–176.
CAV-2013-UhlerD #automation #named #query #smt #symbolic computation
Smten: Automatic Translation of High-Level Symbolic Computations into SMT Queries (RU, ND), pp. 678–683.
ASPLOS-2012-KingDA #automation #generative #hardware #interface
Automatic generation of hardware/software interfaces (MK, ND, A), pp. 325–336.
FM-2008-ArvindDK #design #verification
Getting Formal Verification into Design Flow (A, ND, MK), pp. 12–32.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.