Travelled to:
1 × Germany
Collaborated with:
V.Narayanan D.L.Landis
Talks about:
processor (1) generat (1) hazard (1) driven (1) test (1) smt (1)
Person: Padmaraj Singh
DBLP: Singh:Padmaraj
Contributed to:
Wrote 1 papers:
- DATE-2012-SinghNL #generative #smt #testing
- Hazard driven test generation for SMT processors (PS, VN, DLL), pp. 256–259.