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Travelled to:
1 × USA
Collaborated with:
∅
Talks about:
character (1) substrat (1) discret (1) jitter (1) effect (1) modul (1) clock (1) time (1) nois (1) due (1)

Person: Payam Heydari

DBLP DBLP: Heydari:Payam

Contributed to:

DAC 20032003

Wrote 1 papers:

DAC-2003-Heydari
Characterizing the effects of clock jitter due to substrate noise in discrete-time D/S modulators (PH), pp. 532–537.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.