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Travelled to:
1 × France
2 × Germany
Collaborated with:
D.Arora S.Malik V.Singh K.K.Saluja E.Larsson W.Yang Y.Vizel A.Gupta N.Tsiskaridze K.Pasricha D.Reisman A.Susnea
Talks about:
verif (2) secur (2) multiprocessor (1) multiplex (1) techniqu (1) properti (1) function (1) composit (1) commerci (1) circuit (1)

Person: Pramod Subramanyan

DBLP DBLP: Subramanyan:Pramod

Contributed to:

DATE 20142014
DATE 20132013
DATE 20102010
CAV (2) 20182018

Wrote 4 papers:

DATE-2014-SubramanyanA #design #security #verification
Formal verification of taint-propagation security properties in a commercial SoC design (PS, DA), pp. 1–2.
DATE-2013-SubramanyanTPRSM #analysis #functional #reverse engineering #using
Reverse engineering digital circuits using functional analysis (PS, NT, KP, DR, AS, SM), pp. 1277–1280.
DATE-2010-SubramanyanSSL #execution #fault tolerance #multi #performance
Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors (PS, VS, KKS, EL), pp. 1572–1577.
CAV-2018-YangVSGM #composition #lazy evaluation #security #self #verification
Lazy Self-composition for Security Verification (WY, YV, PS, AG, SM), pp. 136–156.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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