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Travelled to:
1 × USA
Collaborated with:
F.Bürgin F.Carbognani M.Hediger H.Meier R.Santschi H.Kaeslin N.Felber W.Fichtner
Talks about:
architectur (1) implement (1) algorithm (1) trade (1) power (1) adapt (1) vlsi (1) hear (1) off (1) low (1)

Person: Robert Meyer-Piening

DBLP DBLP: Meyer-Piening:Robert

Contributed to:

DAC 20062006

Wrote 1 papers:

DAC-2006-BurginCHMMSKFF #adaptation #algorithm #architecture #implementation #power management #trade-off
Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm (FB, FC, MH, HM, RMP, RS, HK, NF, WF), pp. 558–561.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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