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Travelled to:
1 × France
Collaborated with:
X.Chen G.Zhang H.Wang P.Wu L.Zhang
Talks about:
core (2) multiprocessor (1) pseudo (1) simul (1) real (1) fpga (1) chip (1) base (1) mrp (1) mix (1)

Person: Ruiyang Wu

DBLP DBLP: Wu:Ruiyang

Contributed to:

DATE 20152015

Wrote 1 papers:

DATE-2015-ChenZWWWZ #multi #named #pseudo #simulation
MRP: mix real cores and pseudo cores for FPGA-based chip-multiprocessor simulation (XC, GZ, HW, RW, PW, LZ), pp. 211–216.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.