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Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
M.J.Ciesielski D.Kim K.Shim S.Park S.Cho J.Han D.Kwak N.Kim D.Cha J.Park J.Kim
Talks about:
simul (4) predict (3) level (3) new (3) hdl (3) parallel (2) driven (2) power (2) event (2) gate (2)

Person: Seiyang Yang

DBLP DBLP: Yang:Seiyang

Contributed to:

DATE 20142014
DATE 20112011
DAC 20042004

Wrote 4 papers:

DATE-2014-YangHKKCPK #parallel #predict #simulation
Predictive parallel event-driven HDL simulation with a new powerful prediction strategy (SY, JH, DK, NK, DC, JP, JK), pp. 1–3.
DATE-2011-KimCSY #modelling #parallel #performance #simulation #using
Temporal parallel simulation: A fast gate-level HDL simulation using higher level models (DK, MJC, KS, SY), pp. 1584–1589.
DATE-2011-KimCY #distributed #predict #simulation
A new distributed event-driven gate-level HDL simulation by accurate prediction (DK, MJC, SY), pp. 547–550.
DAC-2004-ParkCYC #power management #testing
A new state assignment technique for testing and low power (SP, SC, SY, MJC), pp. 510–513.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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