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Travelled to:
1 × USA
Collaborated with:
T.Chiba N.Okuda T.Kambe I.Nishioka T.Inufushi
Talks about:
hierarch (1) system (1) layout (1) sharp (1) vlsi (1)

Person: Sieji Kimura

DBLP DBLP: Kimura:Sieji

Contributed to:

DAC 19811981

Wrote 1 papers:

DAC-1981-ChibaOKNIK #layout #named
SHARPS: A hierarchical layout system for VLSI (TC, NO, TK, IN, TI, SK), pp. 820–827.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.