BibSLEIGH corpus
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Travelled to:
3 × USA
Collaborated with:
I.Nishioka T.Kambe T.Inufushi N.Okuda S.Kimura S.Kimura T.Kurimoto H.Nishida S.Yamamoto T.Nagakawa T.Fujioka M.Uchino
Talks about:
system (2) placement (1) algorithm (1) multilay (1) hierarch (1) polycel (1) densiti (1) automat (1) layout (1) sharp (1)

Person: Toru Chiba

DBLP DBLP: Chiba:Toru

Contributed to:

DAC 19821982
DAC 19811981
DAC 19801980

Wrote 3 papers:

DAC-1982-KambeCKION #algorithm #evaluation
A placement algorithm for polycell LSI and ITS evaluation (TK, TC, SK, TI, NO, IN), pp. 655–662.
DAC-1981-ChibaOKNIK #layout #named
SHARPS: A hierarchical layout system for VLSI (TC, NO, TK, IN, TI, SK), pp. 820–827.
DAC-1980-NishiokaKNYCNFU #automation #multi
An automatic routing system for high density multilayer printed wiring boards (IN, TK, HN, SY, TC, TN, TF, MU), pp. 520–527.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.