Travelled to:2 × USA
Collaborated with:T.Kambe T.Chiba N.Okuda I.Nishioka S.Kimura S.Kimura
Talks about:placement (1) algorithm (1) hierarch (1) polycel (1) system (1) layout (1) sharp (1) evalu (1) vlsi (1) lsi (1)
Person: Tsuneo Inufushi
DBLP: Inufushi:Tsuneo
Contributed to:
19821981Wrote 2 papers:
- DAC-1982-KambeCKION #algorithm #evaluation
- A placement algorithm for polycell LSI and ITS evaluation (TK, TC, SK, TI, NO, IN), pp. 655–662.
- DAC-1981-ChibaOKNIK #layout #named
- SHARPS: A hierarchical layout system for VLSI (TC, NO, TK, IN, TI, SK), pp. 820–827.