BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
6 × USA
Collaborated with:
T.Kurimoto T.Chiba H.Nishida T.Kambe T.Inufushi N.Okuda K.Sahara K.Kobori S.Yamamoto I.Shirakawa H.Ozaki S.Kimura S.Kimura T.Nagakawa T.Fujioka M.Uchino
Talks about:
system (4) print (4) board (4) wire (4) layout (3) placement (2) automat (2) minicomputer (1) algorithm (1) multilay (1)

Person: Ikuo Nishioka

DBLP DBLP: Nishioka:Ikuo

Contributed to:

DAC 19821982
DAC 19811981
DAC 19801980
DAC 19791979
DAC 19781978
DAC 19771977

Wrote 6 papers:

DAC-1982-KambeCKION #algorithm #evaluation
A placement algorithm for polycell LSI and ITS evaluation (TK, TC, SK, TI, NO, IN), pp. 655–662.
DAC-1981-ChibaOKNIK #layout #named
SHARPS: A hierarchical layout system for VLSI (TC, NO, TK, IN, TI, SK), pp. 820–827.
DAC-1980-NishiokaKNYCNFU #automation #multi
An automatic routing system for high density multilayer printed wiring boards (IN, TK, HN, SY, TC, TN, TF, MU), pp. 520–527.
DAC-1979-SaharaKN #interactive #layout
An interactive layout system of analog printed wiring boards (KiS, KiK, IN), pp. 506–512.
DAC-1978-NishiokaKYSO #approach
An approach to gate assignment and module placement for printed wiring boards (IN, TK, SY, IS, HO), pp. 60–69.
DAC-1977-NishiokaKN #automation #layout
A minicomputerized automatic layout system for two-layer printed wiring boards (IN, TK, HN), pp. 1–11.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.