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Travelled to:
1 × Germany
Collaborated with:
H.Li X.Li
Talks about:
generat (1) scheme (1) faster (1) speed (1) delay (1) clock (1) than (1) test (1) chip (1)

Person: Songwei Pei

DBLP DBLP: Pei:Songwei

Contributed to:

DATE 20102010

Wrote 1 papers:

DATE-2010-PeiLL #generative #testing
An on-chip clock generation scheme for faster-than-at-speed delay testing (SP, HL, XL), pp. 1353–1356.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.