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Travelled to:
1 × France
Collaborated with:
P.Mangalagiri N.Vijaykrishnan
Talks about:
schedul (1) exploit (1) clock (1) skew (1) fpga (1)

Person: Sungmin Bae

DBLP DBLP: Bae:Sungmin

Contributed to:

DATE 20092009

Wrote 1 papers:

DATE-2009-BaeMV #scheduling
Exploiting clock skew scheduling for FPGA (SB, PM, NV), pp. 1524–1529.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.