Travelled to:3 × France
Collaborated with:N.Onizawa A.Matsumoto S.Matsunaga D.Suzuki M.Natsui A.Mochizuki J.Hayakawa S.Ikeda K.Miura T.Endoh H.Ohno
Talks about:base (3) nonvolatil (2) memori (2) logic (2) interconnect (1) architectur (1) asynchron (1) spintron (1) prospect (1) paradigm (1)
Person: Takahiro Hanyu
DBLP: Hanyu:Takahiro
Contributed to:
201520112009Wrote 3 papers:
- DATE-2015-HanyuSOMNM #architecture #in memory #paradigm #power management #reliability #towards
- Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm (TH, DS, NO, SM, MN, AM), pp. 1006–1011.
- DATE-2011-OnizawaMH #communication #monitoring
- Interconnect-fault-resilient delay-insensitive asynchronous communication link based on current-flow monitoring (NO, AM, TH), pp. 776–781.
- DATE-2009-MatsunagaHIMEOH #in memory
- MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues (SM, JH, SI, KM, TE, HO, TH), pp. 433–435.