BibSLEIGH corpus
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Used together with:
energi (6)
base (6)
memori (5)
architectur (4)
processor (4)

Stem nonvolatil$ (all stems)

14 papers:

DACDAC-2015-LiuLLWLMLCJ0SY #energy
Ambient energy harvesting nonvolatile processors: from circuit to system (YL, ZL, HL, YW, XL, KM, SL, MFC, SJ, YX, JS, HY), p. 6.
DACDAC-2015-ZhangLSLWXY #energy #migration #scheduling
Deadline-aware task scheduling for solar-powered nonvolatile sensor nodes with global energy migration (DZ, YL, XS, JL, TW, CJX, HY), p. 6.
DATEDATE-2015-HanyuSOMNM #architecture #in memory #paradigm #power management #reliability #towards
Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm (TH, DS, NO, SM, MN, AM), pp. 1006–1011.
DATEDATE-2015-LiLZGSSZCLY #energy #performance
An energy efficient backup scheme with low inrush current for nonvolatile SRAM in energy harvesting sensor nodes (HL, YL, QZ, YG, XS, GS, CZ, MFC, RL, HY), pp. 7–12.
DATEDATE-2015-ShutoYS #architecture #case study #comparative #using
Comparative study of power-gating architectures for nonvolatile FinFET-SRAM using spintronics-based retention technology (YS, SY, SS), pp. 866–871.
SACSAC-2015-KimK #scalability #using
Dual region write buffering: making large-scale nonvolatile buffer using small capacitor in SSD (DK, SK), pp. 2039–2046.
HPCAHPCA-2015-MaZLSLLS0N #architecture #energy
Architecture exploration for ambient energy harvesting nonvolatile processors (KM, YZ, SL, KS, XL, YL, JS, YX, VN), pp. 526–537.
DATEDATE-2014-WangYSK #encryption #energy #in memory #performance
Energy efficient in-memory AES encryption based on nonvolatile domain-wall nanowire (YW, HY, DS, PK), pp. 1–4.
HPCAHPCA-2014-KannanGS #cost analysis #persistent
Reducing the cost of persistence for nonvolatile heaps in end user devices (SK, AG, KS), pp. 512–523.
DATEDATE-2013-ShengWLY #named #parallel
SPaC: a segment-based parallel compression for backup acceleration in nonvolatile processors (XS, YW, YL, HY), pp. 865–868.
DATEDATE-2012-WangLLZLSCY #architecture
A compression-based area-efficient recovery architecture for nonvolatile processors (YW, YL, YL, DZ, SL, BS, MFC, HY), pp. 1519–1524.
HPCAHPCA-2012-PanDWZ #enterprise #memory management #performance
Quasi-nonvolatile SSD: Trading flash memory nonvolatility to improve storage system performance for enterprise applications (YP, GD, QW, TZ), pp. 179–188.
DATEDATE-2009-MatsunagaHIMEOH #in memory
MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues (SM, JH, SI, KM, TE, HO, TH), pp. 433–435.
The zen of nonvolatile memories (EJP), pp. 815–820.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.