Travelled to:
1 × Spain
3 × Germany
Collaborated with:
J.Sridharan A.Chandy ∅ J.Kim V.Varghese P.M.Young A.Hajjar I.Munn A.A.Andrews M.Bjorkman
Talks about:
use (4) clock (2) technolog (1) capacitor (1) systemat (1) interact (1) influenc (1) criteria (1) behavior (1) statist (1)
Person: Tom Chen
DBLP: Chen:Tom
Contributed to:
Wrote 6 papers:
- DATE-2006-SridharanC #modelling #multi #using
- Modeling multiple input switching of CMOS gates in DSM technology using HDMR (JS, TC), pp. 626–631.
- DATE-2005-ChandyC #interactive #performance
- Performance Driven Decoupling Capacitor Allocation Considering Data and Clock Interactions (AC, TC), pp. 984–985.
- DATE-2005-VargheseCY #analysis #using
- Systematic Analysis of Active Clock Deskewing Systems Using Control Theory (VV, TC, PMY), pp. 820–825.
- DATE-2001-Chen #grid #on the #power management
- On the impact of on-chip inductance on signal nets under the influence of power grid noise (TC), pp. 451–459.
- DATE-2001-HajjarCMAB #behaviour #quality #statistics #using #verification
- High quality behavioral verification using statistical stopping criteria (AH, TC, IM, AAA, MB), pp. 411–419.
- ICPR-v3-2000-KimC #image #network #segmentation #sequence #using
- Segmentation of Image Sequences Using SOFM Networks (JK, TC), pp. 3877–3880.