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Travelled to:
1 × USA
Collaborated with:
Y.Hu R.Majumdar L.He
Talks about:
resynthesi (1) sequenti (1) function (1) reduct (1) output (1) multi (1) fpga (1) base (1) area (1)

Person: Victor Shih

DBLP DBLP: Shih:Victor

Contributed to:

DAC 20082008

Wrote 1 papers:

DAC-2008-HuSMH #multi #reduction
FPGA area reduction by multi-output function based sequential resynthesis (YH, VS, RM, LH), pp. 24–29.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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