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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
M.J.Garzarán D.S.Gracia J.L.Briz P.E.Ibáñez M.Ortín M.Villarroya C.Izu T.Monreal F.Vallejo R.Beivide M.Prvulovic J.M.Llabería L.Rauchwerger J.Torrellas
Talks about:
multiprocessor (2) hardwar (2) construct (1) character (1) tradeoff (1) prefetch (1) traffic (1) reactiv (1) pattern (1) homogen (1)

Person: Víctor Viñals

DBLP DBLP: Vi=ntilde=als:V=iacute=ctor

Contributed to:

DATE 20142014
DATE 20092009
HPCA 20032003
PDP 20012001

Wrote 4 papers:

Dynamic construction of circuits for reactive traffic in homogeneous CMPs (MO, DSG, MV, CI, VV), pp. 1–4.
DATE-2009-GraciaMVBV #latency
Light NUCA: A proposal for bridging the inter-cache latency gap (DSG, TM, FV, RB, VV), pp. 530–535.
HPCA-2003-GarzaranPLVRT #concurrent #memory management #multi #thread #trade-off
Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors (MJG, MP, JML, VV, LR, JT), pp. 191–202.
PDP-2001-GarzaranBIV #effectiveness #hardware #multi
Hardware Prefetching in Bus-Based Multiprocessors: Pattern Characterization and Cost-Effective Hardware (MJG, JLB, PEI, VV), pp. 345–354.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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