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Travelled to:
1 × USA
Collaborated with:
S.Huang C.Cheng Y.Nieh
Talks about:
regist (1) period (1) minim (1) clock (1) bind (1)

Person: Wei-Chieh Yu

DBLP DBLP: Yu:Wei=Chieh

Contributed to:

DAC 20062006

Wrote 1 papers:

DAC-2006-HuangCNY
Register binding for clock period minimization (SHH, CHC, YTN, WCY), pp. 439–444.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.