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Travelled to:
1 × Cyprus
2 × USA
Collaborated with:
X.Zhang K.Wang Q.Lu R.Lee X.Guo B.Jin T.Huang F.Chen J.Lin Z.Zhang P.Sadayappan K.Zhang Y.Yuan S.Ma
Talks about:
cach (3) multicor (2) processor (1) implement (1) transact (1) conflict (1) approach (1) process (1) perform (1) insight (1)

Person: Xiaoning Ding

DBLP DBLP: Ding:Xiaoning

Contributed to:

VLDB 20142014
PPoPP 20112011
VLDB 20092009
HPCA 20082008
ICEIS DISI 20062006

Wrote 5 papers:

VLDB-2014-WangZYMLD0 #concurrent #query
Concurrent Analytical Query Processing with GPUs (KW, KZ, YY, SM, RL, XD, XZ), pp. 1011–1022.
PPoPP-2011-DingWZ #multi #named #optimisation #performance
ULCC: a user-level facility for optimizing shared cache performance on multicores (XD, KW, XZ), pp. 103–112.
VLDB-2009-LeeDCLZ #database #manycore #named
MCC-DB: Minimizing Cache Conflicts in Multi-core Processors for Databases (RL, XD, FC, QL, XZ), pp. 373–384.
HPCA-2008-LinLDZZS #clustering #manycore #simulation
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems (JL, QL, XD, ZZ, XZ, PS), pp. 367–378.
ICEIS-DISI-2006-DingGJH #approach #modelling #transaction
A New Approach to Implement Extended Transaction Models in J2EE (XD, XG, BJ, TH), pp. 118–123.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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