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Travelled to:
1 × France
2 × Germany
Collaborated with:
L.Sekanina M.Bidlo M.C.0002 J.Matyás V.Mrazek T.Vojnar
Talks about:
circuit (3) optim (3) method (2) design (2) postsynthesi (1) evolutionari (1) polymorph (1) implement (1) function (1) approxim (1)

Person: Zdenek Vasícek

DBLP DBLP: Vas=iacute=cek:Zdenek

Contributed to:

DATE 20122012
DATE 20112011
DATE 20102010
CAV (1) 20182018

Wrote 4 papers:

DATE-2012-SekaninaV #optimisation #polymorphism #satisfiability
A SAT-based fitness function for evolutionary optimization of polymorphic circuits (LS, ZV), pp. 715–720.
DATE-2011-VasicekS #optimisation
A global postsynthesis optimization method for combinational circuits (ZV, LS), pp. 1525–1528.
DATE-2010-VasicekSB #design #implementation
A method for design of impulse bursts noise filters optimized for FPGA implementations (ZV, LS, MB), pp. 1731–1736.
CAV-2018-CeskaMMSVV #approximate #automation #design #named
ADAC: Automated Design of Approximate Circuits (MC0, JM, VM, LS, ZV, TV), pp. 612–620.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.