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circuit (2)
digit (2)
fulli (2)
insul (2)
silicon (2)

Stem deplet$ (all stems)

4 papers:

DATEDATE-2015-SalivaCHFABBA #monitoring #reliability
Digital circuits reliability with in-situ monitors in 28nm fully depleted SOI (MS, FC, VH, XF, DA, AB, AB, LA), pp. 441–446.
Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs (EB, AV, BG, OT, TB, YT, SB, GM, OB, YM, PF, JPN, FA, BPP, AG, SC, PR, JLC, SE, RW), pp. 613–618.
LICSLICS-2003-GradelK #fixpoint
Will Deflation Lead to Depletion? On Non-Monotone Fixed Point Inductions (EG, SK), p. 158–?.
DACDAC-2000-ShepardK #analysis
Static noise analysis for digital integrated circuits in partially-depleted silicon-on-insulator technology (KLS, DJK), pp. 239–242.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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