3 papers:
DATE-2013-BeigneVGTBTBMBMFNAPGCRCEW #design- Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs (EB, AV, BG, OT, TB, YT, SB, GM, OB, YM, PF, JPN, FA, BPP, AG, SC, PR, JLC, SE, RW), pp. 613–618.
ICPR-v4-2006-ZhangY06a #recognition- Insulators Recognition for 220kv/330kv High-voltage Live-line Cleaning Robot (JZ, RY), pp. 630–633.
DAC-2000-ShepardK #analysis- Static noise analysis for digital integrated circuits in partially-depleted silicon-on-insulator technology (KLS, DJK), pp. 239–242.
