2 papers:
- DATE-2009-AhmedERCST #performance #pipes and filters #programmable #reduction
- Exploration of power reduction and performance enhancement in LEON3 processor with ESL reprogrammable eFPGA in processor pipeline and as a co-processor (SZA, JE, LR, JBC, GS, LT), pp. 184–189.
- DATE-2003-BeckerTVB #architecture #configuration management #industrial #integration
- An Industrial/Academic Configurable System-on-Chip Project (CSoC): Coarse-Grain XXP-/Leon-Based Architecture Integration (JB, AT, MV, VB), pp. 11120–11121.