Exploration of power reduction and performance enhancement in LEON3 processor with ESL reprogrammable eFPGA in processor pipeline and as a co-processor
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Syed Zahid Ahmed, Julien Eydoux, Laurent Rouge, Jean-Baptiste Cuelle, Gilles Sassatelli, Lionel Torres
Exploration of power reduction and performance enhancement in LEON3 processor with ESL reprogrammable eFPGA in processor pipeline and as a co-processor
DATE, 2009.

DATE 2009
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@inproceedings{DATE-2009-AhmedERCST,
	author        = "Syed Zahid Ahmed and Julien Eydoux and Laurent Rouge and Jean-Baptiste Cuelle and Gilles Sassatelli and Lionel Torres",
	booktitle     = "{Proceedings of the 13th Conference on Design, Automation and Test in Europe}",
	pages         = "184--189",
	publisher     = "{IEEE}",
	title         = "{Exploration of power reduction and performance enhancement in LEON3 processor with ESL reprogrammable eFPGA in processor pipeline and as a co-processor}",
	year          = 2009,
}

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