21 papers:
- DATE-2015-BaranowskiFKLTW #online #predict
- On-line prediction of NBTI-induced aging rates (RB, FF, SK, CL, MBT, HJW), pp. 589–592.
- DAC-2014-WangX #on the #performance #simulation
- On the Simulation of NBTI-Induced Performance Degradation Considering Arbitrary Temperature and Voltage Variations (TW, QX), p. 6.
- DATE-2013-ZoniF
- Sensor-wise methodology to face NBTI stress of NoC buffers (DZ, WF), pp. 1038–1043.
- DAC-2012-KumarBKV #analysis #predict #source code #using
- Early prediction of NBTI effects using RTL source code analysis (JAK, KMB, HK, SV), pp. 808–813.
- DATE-2012-FirouziKT
- NBTI mitigation by optimized NOP assignment and insertion (FF, SK, MBT), pp. 218–223.
- DATE-2011-AsenovBC #aspect-oriented #statistics
- Statistical aspects of NBTI/PBTI and impact on SRAM yield (AA, ARB, BC), pp. 1480–1485.
- DATE-2011-CalimeraLMP #architecture
- Partitioned cache architectures for reduced NBTI-induced aging (AC, ML, EM, MP), pp. 938–943.
- DATE-2011-ChanSGK #on the
- On the efficacy of NBTI mitigation techniques (TBC, JS, PG, RK), pp. 932–937.
- DAC-2010-QiWCWBCS #design
- SRAM-based NBTI/PBTI sensor system design (ZQ, JW, ACC, SNW, TNB, BHC, MRS), pp. 849–852.
- DATE-2010-LiZYZ #functional
- Proactive NBTI mitigation for busy functional units in out-of-order microprocessors (LL, YZ, JY, JZ), pp. 411–416.
- DATE-2010-RickettsSRVP #power management
- Investigating the impact of NBTI on different power saving cache strategies (AJR, JS, KR, NV, DKP), pp. 592–597.
- DATE-2010-SeyabH #framework #modelling
- NBTI modeling in the framework of temperature variation (S, SH), pp. 283–286.
- DATE-2009-BildBD #performance #using
- Minimization of NBTI performance degradation using internal node control (DRB, GEB, RPD), pp. 148–153.
- DATE-2009-ChakrabortyGRP #analysis #optimisation
- Analysis and optimization of NBTI induced clock skew in gated clock trees (AC, GG, AR, DZP), pp. 296–299.
- DATE-2009-WuM #logic #order #performance
- Joint logic restructuring and pin reordering against NBTI-induced performance degradation (KCW, DM), pp. 75–80.
- DAC-2007-KangKIAR #estimation #metric #online #reliability #using
- Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement (KK, KK, AEI, MAA, KR), pp. 358–363.
- DAC-2007-KumarKS #synthesis
- NBTI-Aware Synthesis of Digital Circuits (SVK, CHK, SSS), pp. 370–375.
- DAC-2007-WangYBVVLC #performance
- The Impact of NBTI on the Performance of Combinational and Sequential Circuits (WW, SY, SB, RV, SBKV, FL, YC), pp. 364–369.
- DATE-2007-WangLHLYX #modelling #performance
- Temperature-aware NBTI modeling and the impact of input vector control on performance degradation (YW, HL, KH, RL, HY, YX), pp. 546–551.
- DAC-2006-VattikondaWC #design #modelling #robust
- Modeling and minimization of PMOS NBTI effect for robust nanometer design (RV, WW, YC), pp. 1047–1052.
- DATE-2006-PaulKKAR #design #estimation #performance #reliability
- Temporal performance degradation under NBTI: estimation and design for improved reliability of nanoscale circuits (BCP, KK, HK, MAA, KR), pp. 780–785.