6 papers:
DATE-2011-ChandraA- Analytical model for SRAM dynamic write-ability degradation due to gate oxide breakdown (VC, RCA), pp. 1172–1175.
- DATE-2005-CarterOS #concurrent #fault #modelling #testing
- Circuit-Level Modeling for Concurrent Testing of Operational Defects due to Gate Oxide Breakdown (JRC, SO, DJS), pp. 300–305.
DAC-2004-SultaniaSS #trade-off- Tradeoffs between date oxide leakage and delay for dual Tox circuits (AKS, DS, SSS), pp. 761–766.
- DATE-v2-2004-BernardiniPM
- A Tunneling Model for Gate Oxide Failure in Deep Sub-Micron Technology (SB, JMP, PM), pp. 1404–1405.
- DAC-2003-LeeKBS #analysis
- Analysis and minimization techniques for total leakage considering gate oxide leakage (DL, WK, DB, DS), pp. 175–180.
- DAC-2000-TianWB #modelling
- Model-based dummy feature placement for oxide chemical-mechanical polishing manufacturability (RT, DFW, RB), pp. 667–670.
