6 papers:
DAC-2015-LiXGWY #interface- Merging the interface: power, area and accuracy co-optimization for RRAM crossbar-based mixed-signal computing system (BL, LX, PG, YW, HY), p. 6.
DATE-2015-GaillardonTSTOS #power management- A ultra-low-power FPGA based on monolithically integrated RRAMs (PEG, XT, JS, MT, SRO, DS, YL, GDM), pp. 1203–1208.
- DATE-2015-LiJHWCGLKW #design #optimisation #using
- Variation-aware, reliability-emphasized design and optimization of RRAM using SPICE model (HL, ZJ, PH, YW, HYC, BG, XYL, JFK, HSPW), pp. 1425–1430.
- DATE-2015-TangXLLCWY #network #question
- Spiking neural network with RRAM: can we use it for real-world application? (TT, LX, BL, RL, YC, YW, HY), pp. 860–865.
- DATE-2012-HaronH #fault
- DfT schemes for resistive open defects in RRAMs (NZH, SH), pp. 799–804.
- DATE-2011-XuDJX #design
- Design implications of memristor-based RRAM cross-point structures (CX, XD, NPJ, YX), pp. 734–739.
