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comput (5)
base (4)
code (3)
scale (3)

Stem stencil$ (all stems)

18 papers:

PLDIPLDI-2015-MendisBWKRPZA #domain-specific language #kernel #named
Helium: lifting high-performance stencil kernels from stripped x86 binaries to halide DSL code (CM, JB, KW, SK, JRK, SP, QZ, SPA), pp. 391–402.
CGOCGO-2015-ShresthaGMMF #concurrent #locality
Locality aware concurrent start for stencil applications (SS, GRG, JM, AM, JF), pp. 157–166.
HPDCHPDC-2015-GamellTHMKCP
Exploring Failure Recovery for Stencil-based Applications at Extreme Scales (MG, KT, MAH, JM, HK, JC, MP), pp. 279–282.
HPDCHPDC-2015-WahibM #automation #gpu #kernel #scalability
Automated GPU Kernel Transformations in Large-Scale Production Stencil Applications (MW, NM), pp. 259–270.
DACDAC-2014-CongLXZ #architecture #clustering #reuse
An Optimal Microarchitecture for Stencil Computation Acceleration Based on Non-Uniform Partitioning of Data Reuse Buffers (JC, PL, BX, PZ), p. 6.
PPoPPPPoPP-2014-LeungBEFPRS
Task mapping stencil computations for non-contiguous allocations (VJL, DPB, JE, SPF, NWP, ZDR, MS), pp. 377–378.
DACDAC-2013-NacciRBSBA #algorithm #implementation #synthesis
A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices (AAN, VR, FB, DS, IB, DA), p. 6.
DACDAC-2013-YuYGP #named
E-BLOW: e-beam lithography overlapping aware stencil planning for MCC system (BY, KY, JRG, DZP), p. 7.
SACSAC-2012-LiuHHYS #multi #performance
An application of circumscribed circle filter in the Multi-Stencils Fast Marching method (HL, CCH, HH, MY, ES), pp. 33–38.
CGOCGO-2012-ZhangM #3d #clustering #gpu
Auto-generation and auto-tuning of 3D stencil codes on GPU clusters (YZ, FM), pp. 155–164.
PPoPPPPoPP-2012-TaoBB #development #gpu #kernel #scalability #using
Using GPU’s to accelerate stencil-based computation kernels for the development of large scale scientific applications on heterogeneous systems (JT, MB, SRB), pp. 287–288.
CCCC-2011-HenrettySPFRS #architecture #layout
Data Layout Transformation for Stencil Computations on Short-Vector SIMD Architectures (TH, KS, LNP, FF, JR, PS), pp. 225–245.
PLDIPLDI-2007-KrishnamoorthyBBRRS #automation #effectiveness #parallel
Effective automatic parallelization of stencil computations (SK, MMB, UB, JR, AR, PS), pp. 235–244.
PLDIPLDI-2007-Solar-LezamaATBSS #sketching
Sketching stencils (ASL, GA, LT, RB, VAS, SAS), pp. 167–178.
CHICHI-2005-KelleherP #design #evaluation
Stencils-based tutorials: design and evaluation (CK, RP), pp. 541–550.
SACSAC-2002-Leopold #locality #on the
On optimal temporal locality of stencil codes (CL), pp. 948–952.
HPDCHPDC-1993-KarpovichJSG #algorithm #framework #object-oriented #parallel
A Parallel Object-Oriented Framework for Stencil Algorithms (JFK, MJ, WTS, ASG), pp. 34–41.
DACDAC-1974-Barnes #automation #design
Automated sign design and stencil cutting system (WMB), pp. 300–307.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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