7 papers:
- DATE-2015-DamschenRVP
- Transparent offloading of computational hotspots from binary code to Xeon Phi (MD, HR, GV, CP), pp. 1078–1083.
- VLDB-2015-JhaHLCH #approach #in memory #memory management
- Improving Main Memory Hash Joins on Intel Xeon Phi Processors: An Experimental Approach (SJ, BH, ML, XC, HPH), pp. 642–653.
- CGO-2015-TangZLLHLG #multi #optimisation
- Optimizing and auto-tuning scale-free sparse matrix-vector multiplication on Intel Xeon Phi (WTT, RZ, ML, YL, HPH, XL, RSMG), pp. 136–145.
- HPDC-2014-RezaeiCLCM #manycore #named
- Snapify: capturing snapshots of offload applications on xeon phi manycore processors (AR, GC, CHL, STC, FM), pp. 1–12.
- HPDC-2013-CadambiCLPRSC #middleware #multi #named #performance #reliability
- COSMIC: middleware for high performance and reliable multiprocessing on xeon phi coprocessors (SC, GC, CHL, RP, KR, MS, STC), pp. 215–226.
- HPDC-2013-RamosH #case study #communication #modelling
- Modeling communication in cache-coherent SMP systems: a case-study with Xeon Phi (SR, TH), pp. 97–108.
- ICEIS-2002-BlythCS #architecture #named #xml
- XEON — An Architecture for an XML Enabled Firewall (AB, DC, IS), pp. 1111–1116.